The present invention relates generally to a method of operating a semiconductor memory device.
A memory cell of a semiconductor memory cell is programmed or erased through F-N tunneling. Electrons are charged into a floating gate of the memory cell in response to a program operation, and the electrons charged in the floating gate are discharged in response to an erase operation. The threshold voltage of the memory cell varies depending on the amount of the electrons charged into the floating gate, and data is determined in response to the threshold voltage level detected by a read operation.
A multi-level cell that can store multi-level data of more than two bits is used as the memory cell to increase capacity of data stored in a semiconductor memory device. The memory cell may store data having various states by varying the magnitude of the threshold voltage by adjusting the amount of electric charge in the floating gate of the multi-level cell. A program method of the multi-level cell has been widely used because it increases considerable capacity of a non-volatile memory cell.
However, the time required for a program operation increases as multiple logical pages are programmed into one physical page and where the program operation grows in complexity. The width between threshold voltage distributions narrows as the number of the threshold voltage distributions increases, thereby reducing read margins. As a result, it is increasingly difficult to read data.
An active area, e.g. a channel area, becomes narrow due to a cross coupling phenomenon between a non-selected bit line and a selected bit line when a read operation or a verifying operation of data is performed, and since cell current decreases, it is difficult to read data accurately.